Computers often use virtual memory and cache memory to improve performance. A virtual memory system allows frequently used data and program code to reside in RAM, while less frequently used data and program code is kept on slower storage, such as a disk drive. When a unit of data or program code is requested, the system determines whether the unit of data is contained in the RAM, or within the slower speed device. If the data is contained within the RAM, the processor retrieves it directly from the RAM and thereby avoids retrieving it from the slower device.
Data is retrieved through a key. A translation lookaside buffer, contained within the processor, is searched for an entry that matches the key. If such an entry is found, the translation lookaside buffer returns the actual location of the data in the RAM. The processor then retrieves the entry directly from the RAM using this location.
In a virtual memory system, the data is retrieved in units called pages. Therefore, the key is a virtual page number (VPN), and the data is contained in a RAM memory page having a real page number (RPN). The translation lookaside buffer contains entries having a VPN and a corresponding RPN. When the translation lookaside buffer is searched, using a VPN, and a match is found, the buffer returns the corresponding RPN from the matching entry. The RPN is then used to access the data within RAM. If a matching entry is not found in the translation lookaside buffer, the data is retrieved from the disk, placed in RAM at some real page location, and an entry containing the RPN of the real page location, along with the corresponding VPN, is then placed into one of the entries of the translation lookaside buffer.
Because the translation lookaside buffer contains a relatively small number of entries, it fills up quickly. Sometimes large sections of data or program code are closely related, and therefore will probably be used together. For example, parts of an operating system often must remain in memory at all times. To maximize performance, these sections are stored together in RAM, and a special type of translation lookaside buffer entry is used to reference them. This type of entry is called a block entry, and it is capable of translating a virtual page number to a real page number for more than one page, typically a large number of pages. This is possible because the section of data or program code is stored contiguously in RAM, therefore it has sequential virtual and real page numbers.
These sections of data or program code are variable in size, however, so the block entries must allow translation of different sized areas. In order to accommodate these different sizes, a block entry must have a method of fixing the size of the area to be translated. In prior art systems, this has been accomplished with a mask register, which is typically used to define the size for more than one block entry. This causes two problems. The first problem is the size of the circuitry of the mask register. Since the translation lookaside buffer is built into a processor integrated circuit, this circuitry occupies valuable space on the integrated circuit. Also, additional space is needed for wiring traces to connect the mask registers with the block entries. The second problem is the number of mask registers has been limited, by having a mask register define the size for more than one block entry, thus restricting the number of sections of data or program code that could be translated using block entries.
Therefore, there is need in the art for an improved apparatus and method for defining the mask bits for a block entry of a translation lookaside buffer. There is a further need for such an apparatus and method that provides a mask register for each block entry in the translation lookaside buffer. The present invention meets these and other needs.
This application is related to application Ser. No. 07/726,619 filed Jul. 8, 1991 of Jeffry E. Trull (now abandoned), entitled "Cache memory replacement selector", and application Ser. No. 07/888,673 filed May 27, 1992 of Mark A. Ludwig (still pending), entitled "Fast Lookahead Circuit to Identify an Item in a Large Binary Set", both owned by the same entity, both of which are incorporated herein by reference for all that is disclosed and taught therein.